Multi-core chips are now common and, as they continue to scale up, processors will become the equivalent of a computer cluster on a single die. Therefore, high-bandwidth and low-latency interconnects will be necessary to fully exploit the processing power of these chips. However, current electrical interconnects cannot be scaled to meet the requirement of future high performance electronic circuits because of power dissipation limitations. Silicon photonics has demonstrated that it is possible to build CMOS compatible optical components. However, these require a different wafer structure than state-of-the-art electronics and are therefore not suitable for on-chip interconnects. Therefore, we are investigating novel multi-layer optical waveguide architectures implemented with materials deposited at low temperature that provide a high refractive index contrast. We are also developing techniques to interface these waveguides directly with advanced CMOS circuits.